Quantum Compilation, Benchmarking & Resource Estimation

My compilation and benchmarking work focuses on turning quantum algorithms into executable workflows under realistic hardware constraints. I study how connectivity, qubit/qumode capacity, noise, distributed interconnects, and classical control overhead affect end-to-end performance.

Research themes include:

• circuit partitioning for distributed quantum computing;
• compiler-aware metrics for quantum-HPC and early fault-tolerant devices;
• tensor-network simulation and multi-GPU acceleration for large quantum circuits;
• benchmark design for application-driven quantum algorithms;
• resource estimation from near-term devices to early fault-tolerant quantum computing.

Selected outputs: Quantum 2025, IEEE QCE 2024–2025, QTML 2024, HamilToniQ/QCE 2024.